/*
 * Copyright (c) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED.
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 * Description: dfx resource id
 * This file should be changed only infrequently and with great care.
 */

#ifndef __DFX_RESOURCE_ID_H__
#define __DFX_RESOURCE_ID_H__

#define DFX_EVENT_GROUP_START_BIT 8
#define DFX_MSG_QUEUE_START_BIT 8

typedef enum {
    DFX_EVENT_GROUP_DIAG_TASK = 0,
    DFX_EVENT_GROUP_DIAG_QUEUE_WRITE,
    DFX_EVENT_GROUP_MAX,
} dfx_event_group_id;

typedef enum {
    DFX_EVENT_WR_ID_TEST_A = 0 | (DFX_EVENT_GROUP_DIAG_TASK << DFX_EVENT_GROUP_START_BIT),
    DFX_EVENT_WR_ID_TEST_B = 1 | (DFX_EVENT_GROUP_DIAG_TASK << DFX_EVENT_GROUP_START_BIT),
    DFX_EVENT_WR_ID_DIAG_QUEUE_READ_BLOCK = 2 | (DFX_EVENT_GROUP_DIAG_TASK << DFX_EVENT_GROUP_START_BIT),
    DFX_EVENT_WR_ID_DIAG_QUEUE_WRITE_BLOCK = 3 | (DFX_EVENT_GROUP_DIAG_QUEUE_WRITE << DFX_EVENT_GROUP_START_BIT),
} dfx_event_wr_id;

typedef enum {
    DFX_MSG_QUEUE_DIAG,
    DFX_MSG_QUEUE_MAX,
} dfx_msg_queue_id;

typedef enum {
    DFX_MSG_ID_TEST_A = 1 | (DFX_MSG_QUEUE_DIAG << DFX_MSG_QUEUE_START_BIT),
    DFX_MSG_ID_TEST_B = 2 | (DFX_MSG_QUEUE_DIAG << DFX_MSG_QUEUE_START_BIT),
    DFX_MSG_ID_TEST_C = 3 | (DFX_MSG_QUEUE_DIAG << DFX_MSG_QUEUE_START_BIT),
    DFX_MSG_ID_TRANSMIT_FILE = 10 | (DFX_MSG_QUEUE_DIAG << DFX_MSG_QUEUE_START_BIT),
    DFX_MSG_ID_UART_READ = 11 | (DFX_MSG_QUEUE_DIAG << DFX_MSG_QUEUE_START_BIT),
    DFX_MSG_ID_DIAG_LOG_OUT = 13 | (DFX_MSG_QUEUE_DIAG << DFX_MSG_QUEUE_START_BIT),
    DFX_MSG_ID_DIAG_PKT = 14 | (DFX_MSG_QUEUE_DIAG << DFX_MSG_QUEUE_START_BIT),
} dfx_msg_id;

#endif